Jen-Wei Lee

Latest

• Efficient Hardware Architecture of \eta_T Pairing Accelerator Over Characteristic Three
• Efficient power-analysis-resistant dual-field elliptic curve cryptographic processor using heterogeneous dual-processing-element architecture
• Processor with side-channel attack resistance
• A high-performance elliptic curve cryptographic processor over GF (p) with SPA resistance
• An efficient countermeasure against correlation power-analysis attacks with randomized montgomery operations for DF-ECC processor